Environment
| Machine | CPU | OS | Rust |
|---|---|---|---|
| A (primary) | Intel Core i7-10700KF @ 3.80 GHz | Linux 6.8 | 1.93.1 |
| B (secondary) | Apple M1 Pro | macOS 26.3 | 1.92.0 |
Framework: Criterion, 100 samples, 3-second warmup, ring size 4096 slots.
Same-Thread Roundtrip
L1-hot, measures pure instruction cost with no cache-coherence traffic.
| Payload | Latency (A) | Latency (B) | Cache lines | Notes |
|---|---|---|---|---|
| 8 B | 2.4 ns | 8.6 ns | 1 | Stamp + value share one 64B line |
| 16 B | 9.8 ns | 11.3 ns | 1 | |
| 32 B | 11.8 ns | 13.0 ns | 1 | |
| 64 B | 18.8 ns | 16.4 ns | 2 | Slot = 72B, spills to 2 lines |
| 128 B | 23.3 ns | 25.4 ns | 3 | |
| 256 B | 34.4 ns | 41.2 ns | 5 | |
| 512 B | 55.9 ns | 69.6 ns | 9 | |
| 1 KB | 88.1 ns | 127.9 ns | 17 | memcpy starts to dominate |
| 2 KB | 149.6 ns | 244.6 ns | 33 | |
| 4 KB | 361.6 ns | 500.9 ns | 65 | ~5.6 ns per cache line |
Cross-Thread Roundtrip
Methodology note: The 117 ns at 8B here vs 95 ns in the main benchmarks reflects
differences in Criterion warm-up, iterator structure, and type-generic overhead. Only Photon Ring
is measured; blank cells are payload sizes not run on machine A.
| Payload | Photon Ring (A) | Photon Ring (B) |
|---|---|---|
| 8 B | 117 ns | 156.7 ns |
| 64 B | 125 ns | 195.8 ns |
| 256 B | 148 ns | 156.7 ns |
| 512 B | 163 ns | 167.6 ns |
| 1 KB | 191 ns | 226.5 ns |
| 4 KB | 342 ns | 369.7 ns |
Latency vs Payload Size (Intel i7-10700KF)
Photon Ring same-thread vs cross-thread. Log x-axis.
Key Observations
The memcpy is cheap relative to cache coherence
For payloads up to 56 bytes (one cache line with the stamp), the memcpy costs roughly 2–3 ns against a ~96 ns cache-coherence transfer. The copy is roughly 3% of total latency.
Why copy-based delivery stays competitive at large payloads
A common expectation is that an in-place design (write and read the slot directly, no copy) should beat a copy-on-publish/copy-on-receive approach at large payloads. We have not benchmarked a competitor across these sizes, so this is analysis rather than a measured result — but the copy is not the dominant cost:
- Cache coherence dominates, and any design pays it. Consumers must transfer the modified cache lines from the publisher regardless of whether they read in-place or copy out.
- x86 memcpy is extremely efficient.
rep movsbwith ERMS (Enhanced REP MOVSB) reaches near-memory-bandwidth speeds; a 4 KB copy costs on the order of ~200 ns, small next to the multi-line coherence transfer it rides alongside. - The stamp-only fast path has low fixed overhead. No shared sequence barrier load or handler dispatch on the read side.
Regenerating
cargo bench --bench payload_scaling python3 scripts/plot_payload_scaling.py